Multichannel, Temporally-Interlaced, Pulsatile Speech Processors



  1. In 1986, RTI tested the same strategy 3 "max-rate" IP processor, but without the 'N-of-M' peak-picker add-on.  It was the CIS processor, except that its pulse-rate was far too low.  RTI called this processor the "maximum-rate IP processor."

  2. In late 1987 RTI submitted a patent application that included the "max-rate IP" which is the CIS.  M White was listed as a co-inventor.


Descriptions and Quotes from the Literature: